1. Field of the Invention
This invention relates to microprocessors. In particular, the invention relates to multiprocessing systems.
2. Description of Related Art
A typical multiprocessor system has a number of processors running in parallel. By decomposing a large problem into smaller tasks and allowing these tasks to be executed by concurrent processors, a significant speed improvement is achieved. There are, however, many challenges facing multiprocessor design. Examples of these challenges include cache coherency, snooping protocol, task allocation, communication, and parallel compilers.
Current microprocessors having internal cache memories typically snoop internal caches for cacheable cycles seen on the multiprocessor bus. All cacheable agents have to complete the snoop activities before the cacheable cycle can complete. The snoop activities are often delayed because of slow tag timing or conflicts with on-going internal tag accesses.
Therefore, there is a need to have an efficient mechanism to support task execution in a multiprocessing environment.